IBM Launches POWER 7 Processor February 9, 2010Posted by Peter Varhol in Architectures.
I don’t follow IBM that much, because frankly, there’s too much to follow, and unless you’ve spent some time there and understand the organization, it’s impenetrable.
And this post might better have been titled “What Does Threads Per Core Mean.” I have been hearing that phrase bandied about lately, and I have to admit that I don’t know what it means. I have always thought of threading as an operating system concept, not a processor one.
Well, after a little bit of investigating, I figured it out. Intel came out with a technology about a decade ago that it called hyperthreading. I had actually received NDA (nondisclosure agreement) briefings on the technology when I was with Compuware and we had quarterly meetings with Intel. Intel had paid us to build extensions to SoftICE and BoundsChecker, the premier debugging tools of the day, and we were current on their plans.
Now everyone is building hyperthreading or similar processors – Intel, IBM, Sun (now Oracle), and other processor manufacturers. That’s what IBM is referring to in its announcement of its new POWER 7 microprocessor.
A core is more or less a full processor (I think it shares some on-chip cache with other cores on a die, but that’s about it). Each core has only one execution pipeline, a sequence of steps through which an instruction or set of instructions is executed. However, a hyperthreaded core has multiple parts of the pipeline – typically control registers or general-purpose registers. This allows the processor to appear as two processors to the operating system, allowing the operating system to schedule two threads or processes simultaneously.
The result is that each core can hold multiple thread states at one time. It can’t be actively executing multiple threads, because there’s still only one pipeline, but it can be holding threads that are waiting partway through the execution process. Processors could always do this, as a part of a context switch, but the additional registers means that it can hold the entire thread state on-chip while another thread is using the pipeline.
Anyway, the IBM POWER 7 processor has eight cores, and four threads per core, for a total theoretical capacity of 32 simultaneous threads. In fact, the practical maximum is something over one thread per core, but not anywhere close to four per core at one time.
This processor architecture doesn’t typically help for desktop applications, because user-facing applications typically don’t have more than one thread executing at a time anyway. The logic behind that is that a single user is only doing one thing at a time. Where this kind of processor architecture is useful is for servers, which can be serving dozens or hundreds of users at any given time. And according to this article in the Wall Street Journal (teaser only, full article requires subscription), IBM’s share of the Unix market has grown by 12 percentage points in the last several years.
According to the technical information, the POWER 7 processor also has other interesting features, such as TurboCore, MaxCore, Intelligent Threads, and Active Memory Expansion. I’m going to look further into those technologies for a later post.